POWER-SEM ELECTRONIC TECHNIQUE CO.LTD.
Asia Mirror Site | Americas Mirror Sites
Agents wanted | Technique forum | Postoffice inlet
语言选择 : 简体中文 | English
*POWER-SEM DRIVE CO.,LIMITED
Attention

Testing:
Do a no-load test before using
Preparation:
-Be sure the PWM be positive logic control,that is the IGBT switch on while it is high level input and turn off while low level.
-Be sure the power voltage meet the requirement of the driver :the power voltage for driver is+15V±0.5V.
-Be sure the power :PMAX.=VS(Maximal primary side power voltage )ISMAX.(Maximal primary side current)
-Be sure the PWM input level are suit for input threshold voltage :The input level of PSHI IGBT is +15V(CMOS level or+5V(TTL level).
-Be sure the PWM signal dead time less than the double-low reset time.
The double-low reset time of PCB IGBT driver is 5μs;and 10μs is for Thick-film IGBT and ACEE IGBT.

Not connecting IGBT:
When observing the gate signal without IGBT connected,the VCE monitor terminal on the short-circuit drive must remain active(C and E on the short-bridge driver),thus preventing the gate signal being blocked by the activated over current protection.
If the gate drive signal is output respectively when it is start up and shut down,the drive must be connected to RGON and RGOFF output terminals,so as to prevent incomplete output waveform.
If a high-level-resetting drive is applied,it must be connected to the reset. If PSHI 10 has a high-level reset,the reset must be connected with the ground instead of being suspended in the air,otherwise no output will happen.
If an external fault input terminal is involved,the drive must be connected to the fault input terminal,otherwise the fault will be activated and black the signal.

Normal gate signal VGE=+15V / -8V;or VGE=+15V / -15V(determined by driver)
10μs dead time in half bridge mode(adjusted t from factory)

Interlock and dead time:
Under half bridge ,there is an interlock function to protect the top and the bottom being switched on at the same time ,resulting a dead time between them,which adjusted from factory is 10μs.The dead time can be adjusted by an external resistors between tTD A and tTD B.It can be reduced by paralleing external resistor to Vs at tTD A & tTD B and inner capacitor.
The time error of interlock are determined by external resistance ,so we should select a minor error resistance as possible to avoid imblance.

Connecting controlller:
When connecting driver to control board using short connecting lead, if the length is less than 50cm, flat cable will be used. But if it is between 50cm~100cm, flat or shielded cable is needed. The signal tramistted only by a +15V CMOS level and the connecting lead should be less than 1 meter.For long connecting load ,fiber interface are needed.

Connecting gate:
IGBT gate is connected with RG A or RG B of the driver by external gate resistor RG. Connect the auxiliary emitter of IGBT with E A or E B output of directly. The gate output voltage of the driver VG is ±15V, and the selection for external gate resistor RG is according to the relevant IGBT (refer to the datasheets). Apart from gate resistor RG, a gate-emitter resistor RGE and gate clamp are also needed. Better to keep RGE ≤10kΩ, and gate clamping can be relaized by zener diode or TVS diode.Both the diodes should keep breakthrough voltage≤18V, which can protect gate voltage from rising up severely because of paratistics effect (eg. Miller Effect). When connecting the driver to IGBT gate, flat cable with pairs of conductors twisted is highly recommended and shoud be kept as short as possible(usually shorter than 20cm). Also, please fix gate resistor RG, voltage clamp diode DZ and gate-emitter resistor RGE onto a small PCB. The gate PCB must be installed closed to IGBT.

Reference voltage VCE ref
The monitor sensitivity of "VCE monitoring circuit" is adjusted by changing dead time tdead.This can be realized by extending or reducing monitoring dead area via adusting CCE.Please make sure the tatal time from IGBT conduct(start from short circuit) to IGBT totally turn-off by soft turn-off circuit must shorter than IGBT safe soft circuit time(usually 10us or 6us, details pls refer to IGBT supplier). The total time includes tdead, td(err), tSC, IGBT turn-off trailing time and safety time.

IGBT short circuit and “soft turn-off”
In case of short-circuit, a further circuit increases the resistance in series with Rgoff and turns- off the IGBT at a lower speed.This produces a smaller peak voltage by reducing the di/dt value.Because in short-circuit conditions the Homogeneous IGBT's peak current increases up to 6-8 times the nominal current, and some parasitic inductance is always present in power circuits, it must fall to zero in a longer time than at normal operation to avoid the damage caused by voltage spike to IGBT.
The internal resistor used for soft turn-off is 22Ω,this "soft turn-off " time can be reduced by paralleling resistor Rgoff-SC and internal resistance .
PSHI_PCB IGBT drivers
PSHI 10W
PSHI 20W
PSHI 23W
PSHI 23H
PSHI 23S(Series)
PSHI 25W(F)
PSHI 27W(F)

PSHI_Thick film IGBT drivers
PSHI 222W
PSHI 222WA
PSHI 261W
PSHI 232W(3-level)

PSHI_ACEE IGBT drivers
PSHI 312W
PSHI 321W
PSHI 322W
PSHI 323W
PSHI 324W
PSHI 325W

PSHI_HV IGBT drivers

PSHC_Thyristor drivers
PSHC6S00

All Products

Features and Applications
Performance features
Selection of suitable driver
Attention
Questions
Customization
 Contact Us

BEJING POWER-SEM ELECTRONIC TECHNIQUE CO.,LTD
Address:Room 1902,Building C, zhongguancun SCI-Tech Development Building,34 zhongguancun South Avenue Haidian District, Beijing
Phone:+86-10-6219 5630 / 5631 / 5632
Fax:+86-10-6219 5633
Postcode:100081
Mail: sales@power-sem.com

POWER-SEM ELECTRONICS (H.K) CO., LTD
Mail: hongkong@power-sem.com

$© all rights reserved Beijing POWER-SEM Electronic Technique Co,.Ltd.
Version 2009-07$